IDT71V3556XS - 3.3V Synchronous ZBT SRAMs

Datasheet Details

128K x 36, 256K x 18 memory configurations.
Supports high performance system speed - 200 MHz (x18) (3.2 ns Clock-to-Data Access).
Supports high performance system speed - 166 MHz (x36) (3.5 ns Clock-to-Data Access).
ZBTTM Feature - No dead cycles between write and read cycles.
Internally synchronized output buffer enable eliminates the need to control OE.
Single R/W (READ/WRITE) control pin.
Positive clock-edge triggered address, data, and control signal regis.

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Published: Apr 7, 2019 |