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ICS87946-01 LVPECL-TO-LVCMOS/LVTTL CLOCK GENERATOR

ICS87946-01 Description

www.DataSheet4U.com PRELIMINARY Integrated Circuit Systems, Inc.LOW SKEW ÷1, ÷2 LVPECL-TO-LVCMOS/LVTTL CLOCK GENERATOR .
The ICS87946-01 is a low skew, ÷1, ÷2 Clock Generator and a member of the HiPerClockS™ HiPerClockS™ family of High Performance Clock Solutions from IC.

ICS87946-01 Features

* 10 single ended LVCMOS outputs, 7Ω typical output impedance
* LVPECL clock input pair
* PCLK, nPCLK supports the following input levels: LVPECL, CML, SSTL
* Maximum input frequency: 250MHz
* Output skew: 200ps (maximum)
* Part-to-part skew: 500ps (ty

ICS87946-01 Applications

* demanding well defined performance and repeatability. BLOCK DIAGRAM PIN ASSIGNMENT MR/nOE GND GND VDDA VDDA QA0 QA1 QA2 PCLK nPCLK DIV_SELA ÷1 ÷2 0 QA0 - QA2 1 nc 0 QB0 - QB2 1 VDD PCLK nPCLK DIV_SELA 0 QC0 - QC3 1 DIV_SELB DIV_SELC GND 1 2 3 4 5 6 7 8 32 31 30 29 28 27 26 25 24 23 22 GND QB0

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Datasheet Details

Part number
ICS87946-01
Manufacturer
ICS
File Size
184.50 KB
Datasheet
ICS87946-01_ICS.pdf
Description
LVPECL-TO-LVCMOS/LVTTL CLOCK GENERATOR

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📌 All Tags

LVPECL-TO-LVCMOS LVTTL CLOCK GENERATOR ICS
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