Description
www.DataSheet4U.com 128MBit MOBILE SDR SDRAMs based on 2M x 4Bank x16 I/O Specification of 128M (8Mx16bit) Mobile SDRAM Memory Cell Array - Organiz.
Features
* Standard SDRAM Protocol Clock Synchronization Operation - All the commands registered on positive edge of basic input clock (CLK) MULTIBANK OPERATION - Internal 4bank operation - During burst Read or Write operation, burst Read or Write for a different bank is performed. - During bApplications
* which requires large memory density and high bandwidth. It is organized as 4banks of 2,097,152x16. Mobile SDRAM is a type of DRAM which operates in synchronization with input clock. The Hynix Mobile SDRAM latch each control signal at the rising edge of a basic input clock (CLK) and input/output dataH55S1262EFP-60M Distributors
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