74LV175 Datasheet (Hitachi Semiconductor)

74LV175, Quad. D-type Flip-Flops

Information at the D inputs of the HD74LV175A is transferred to the Q and Q outputs on the positive going edge of the clock pulse.

Both true and complement outputs from each flip-flop are externally available.

All four flip-flops are controlled by a common clock and common clear.

Clearing is accompl

74LV175 Features

* VCC = 2.0 V to 5.5 V operation All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V) All outputs VO (Max.) = 5.5 V (@VCC = 0 V) Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C) Typical VOH undershoot > 2.3 V (@VCC = 3.3 V, Ta = 25°