GS8161E18 Datasheet (GSI) - (GS8161E18 - GS8161E36) Sync Burst SRAMs

GS8161E18, (GS8161E18 - GS8161E36) Sync Burst SRAMs

Applications The GS8161E18(T/D)/GS8161E32(D)/GS8161E36(T/D) is a 18,874,368-bit high performance synchronous SRAM with a 2-bit burst address counter.

Although of a type originally developed for Level 2 Cache applications supporting high performance CPUs, the device now finds application in synchrono

GS8161E18 Features

* FT pin for user-configurable flow through or pipeline operation

* Dual Cycle Deselect (DCD) operation

* IEEE 1149.1 JTAG-compatible Boundary Scan

* 2.5 V or 3.3 V +10%/

* 10% core power supply

* 2.5 V or 3.3 V I/O supply

* LBO pin for Linear or