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GS8672T20/38BE-633/550/500/450/400
165-Bump BGA Commercial Temp Industrial Temp
72Mb SigmaDDR-II+TM Burst of 2 ECCRAMTM
633 MHz–400 MHz 1.8 V VDD 1.5 V I/O
Features
• 2.5 Clock Latency • On-Chip ECC with virtually zero SER • Simultaneous Read and Write SigmaDDR™ Interface • Common I/O bus • JEDEC-standard package • Double Data Rate interface • Byte Write capability • Burst of 2 Read and Write • On-Die Termination (ODT) on Data (DQ), Byte Write (BW),
and Clock (K, K) outputs • 1.8 V +100/–100 mV core power supply • 1.5 V HSTL Interface • Pipelined read operation with self-timed Late Write • Fully coherent read and write pipelines • ZQ pin for programmable output drive strength • IEEE 1149.
GS8672T38BGE Datasheet
