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GS8330DW36 - (GS8330DW36/72) 36M Double Late Write SRAM

GSI Technology

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Datasheet Details

Part number	GS8330DW36
Manufacturer	GSI Technology
File Size	632.01 KB
Description	(GS8330DW36/72) 36M Double Late Write SRAM
Datasheet	GS8330DW36_GSITechnology.pdf

GS8330DW36 Product details

Description

Because SigmaRAMs are synchronous devices, address data inputs and read/write control inputs are captured on the rising edge of the input clock.

Features

Double Late Write mode, Pipelined Read mode.
JEDEC-standard SigmaRAM™ pinout and package.
1.8 V +150/.
100 mV core power supply.
1.8 V CMOS Interface.
ZQ controlled user-selectable output drive strength.
Dual Cycle Deselect.
Burst Read and Write option.
Fully coherent read and write pipelines.
Echo Clock outputs track data output drivers.
Byte write operation (9-bit bytes).
2 user-programma.

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Published: Nov 25, 2005 |