MSC8256 Datasheet (Freescale Semiconductor) - Six-Core Digital Signal Processor

MSC8256, Six-Core Digital Signal Processor

Freescale Semiconductor Data Sheet Six-Core Digital Signal Processor Document Number: MSC8256 Rev.

6, 7/2013 MSC8256 FC-PBGA 783 29 mm × 29 mm Six StarCore SC3850 DSP subsystems, each with an SC3850 DSP core, 32 Kbyte L1 instruction cache, 32 Kbyte L1 data cache, unified 512 Kbyte L2 cache configurable as M2 memory in 64 Kbyte increments, memory management unit (MMU), extended programmable interrupt controller (EPIC), two general-purpose 32-bit timers, debug and profiling sup

MSC8256 Features

* riteBack Buffer (WBB) P-bus 128 bit Xa-bus 64 bit Xb-bus 64-bit Timer Task Protection Address Translation MMU Figure 2. StarCore SC3850 DS