MCF5271 - 32-bit Embedded Controller Division

Freescale Semiconductor

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Datasheet Details

Part number	MCF5271
Manufacturer	Freescale Semiconductor
File Size	1.10 MB
Description	32-bit Embedded Controller Division
Datasheet	MCF5271_FreescaleSemiconductor.pdf

MCF5271 Product details

Description

12 Modes of Operation 16 Design Recommendations 19 Mechanicals/Pinouts and Part Numbers 27 Preliminary Electrical Characteristics 32 Documentation 55 Technical Data © Freescale Semiconductor, Inc., 2004. All rights reserved.MCF5271 Family Configurations 1 MCF5271 Family Configurations Table 1. MCF5271 Family Configurations Module ColdFire V2 Core with EMAC and Hardware Divide System Clock Performance (Dhrystone/2.1 MIPS) Instruction/Data Cache Static RAM (SRAM) Interrupt Controllers (IN

Features

Reset.
Separate reset in and reset out signals.
Six sources of reset: Power-on reset (POR), External, Software, Watchdog, PLL loss of clock, PLL loss of lock.
Status flag indication of source of last reset.
General Purpose I/O interface.
Up to 61 bits of general purpose I/O.
Bit manipulation supported via set/clear functions.
Unused peripheral pins may be used as extra GPIO JTAG support for system level board testing.

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Published: Dec 18, 2006 |