MC100ES6014 - 2.5 V/3.3 V 1:5 Differential ECL/PECL/HSTL/LVDS Clock Driver

Freescale Semiconductor

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Datasheet Details

Part number	MC100ES6014
Manufacturer	Freescale Semiconductor
File Size	282.24 KB
Description	2.5 V/3.3 V 1:5 Differential ECL/PECL/HSTL/LVDS Clock Driver
Datasheet	MC100ES6014_FreescaleSemiconductor.pdf

MC100ES6014 Product details

Description

Pin CLK0 , CLK0 CLK1 , CLK1 Q0:4, Q0:4 CLK_SEL EN VBB VCC VEE Function ECL/PECL/HSTL CLK Input ECL/PECL/HSTL CLK Input ECL/PECL Outputs ECL/PECL Active Clock Select Input ECL Sync Enable Reference Voltage Output Positive Supply Negative Supply Table 2. Function Table CLK0 L H X X X CLK1 X X L H X CLK_SEL L L H H X EN L L L L H Q L H L H L On next negative transition of CLK0 or CLK1 Pins will default LOW when left open. Pins wil

Features

25 ps Within Device Skew 400 ps Typical Propagation Delay Maximum Frequency > 2 GHz Typical The 100 Series Contains Temperature Compensation PECL and HSTL Mode: VCC = 2.375 V to 3.8 V with VEE = 0 V ECL Mode: VCC = 0 V with VEE =.
2.375 V to.
3.8 V LVDS and HSTL Input Compatible Open Input Default State 20-Lead Pb-Free Package Available MC100ES6014 DT SUFFIX 20-LEAD TSSOP.

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Other Datasheets by Freescale Semiconductor

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Published: Feb 24, 2010 |