Datasheet4U Logo Datasheet4U.com

LVT162245 - Low Voltage 16-Bit Transceiver with 3-STATE Outputs and 25 Series Resistors in A Port Outputs

Description

The LVT162245 and LVTH162245 contains sixteen noninverting bidirectional buffers with 3-STATE outputs and is intended for bus oriented applications.

The device is byte controlled.

Each byte has separate control inputs which can be shorted together for full 16-bit operation.

Features

  • s Input and output interface capability to systems at 5V VCC s Bushold data inputs eliminate the need for external pullup resistors to hold unused inputs (74LVTH162245), also available without bushold feature (74LVT162245). s Live insertion/extraction permitted s Power Up/Down high impedance provides glitch-free bus loading s A Port outputs include equivalent series resistance of 25Ω making external termination resistors unnecessary and reducing overshoot and undershoot s A Port outputs source/s.

📥 Download Datasheet

Datasheet Details

Part number LVT162245
Manufacturer Fairchild (onsemi)
File Size 78.81 KB
Description Low Voltage 16-Bit Transceiver with 3-STATE Outputs and 25 Series Resistors in A Port Outputs
Datasheet download datasheet LVT162245 Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
74LVT162245 • 74LVTH162245 Low Voltage 16-Bit Transceiver with 3-STATE Outputs and 25Ω Series Resistors in A Port Outputs January 1999 Revised November 1999 74LVT162245 • 74LVTH162245 Low Voltage 16-Bit Transceiver with 3-STATE Outputs and 25Ω Series Resistors in A Port Outputs General Description The LVT162245 and LVTH162245 contains sixteen noninverting bidirectional buffers with 3-STATE outputs and is intended for bus oriented applications. The device is byte controlled. Each byte has separate control inputs which can be shorted together for full 16-bit operation. The T/R inputs determine the direction of data flow through the device. The OE inputs disable both the A and B ports by placing them in a high impedance state.
Published: |