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FIN1028 - 3.3V LVDS 2-Bit High Speed Differential Receiver

Download the FIN1028 datasheet PDF. This datasheet also covers the FIN variant, as both devices belong to the same 3.3v lvds 2-bit high speed differential receiver family and are provided as variant models within a single manufacturer datasheet.

Description

This dual receiver is designed for high speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technology.

The receiver translates LVDS levels, with a typical differential input threshold of 100 mV, to LVTTL signal levels.

Features

  • s Greater than 400Mbs data rate s 3.3V power supply operation s 0.4ns maximum differential pulse skew s 2.5ns maximum propagation delay s Low power dissipation s Power-Off protection s Fail safe protection for open-circuit, shorted and terminated conditions s Meets or exceeds the TIA/EIA-644 LVDS standard s Flow-through pinout simplifies PCB layout s 8-Lead SOIC and 8-terminal MLP packages save space Ordering Code: Order Number FIN1028M (Note 1) FIN1028MPX (Preliminary) Package Number M08A MLP0.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (FIN-1028.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

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FIN1019 3.3V LVDS High Speed Differential Driver/Receiver ON Semiconductor
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Other Datasheets by Fairchild (onsemi)

Part Number Description
FIN1022 2 X 2 LVDS High Speed Crosspoint Switch
FIN1025 3.3V LVDS 2-Bit High Speed Differential Driver
FIN1026 3.3V LVDS 2-Bit High Speed Differential Receiver
FIN1027 3.3V LVDS 2-Bit High Speed Differential Driver
FIN1027A 3.3V LVDS 2-Bit High Speed Differential Driver

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
FIN1028 3.3V LVDS 2-Bit High Speed Differential Receiver March 2001 Revised June 2003 FIN1028 3.3V LVDS 2-Bit High Speed Differential Receiver General Description This dual receiver is designed for high speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technology. The receiver translates LVDS levels, with a typical differential input threshold of 100 mV, to LVTTL signal levels. LVDS provides low EMI at ultra low power dissipation even at high frequencies. This device is ideal for high speed transfer of clock and data. The FIN1028 can be paired with its companion driver, the FIN1027, or any other LVDS driver. Features s Greater than 400Mbs data rate s 3.3V power supply operation s 0.4ns maximum differential pulse skew s 2.
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