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DM74S112

The DM74S112 is Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop designed by Fairchild Semiconductor.

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Datasheet preview – DM74S112

Datasheet Details

Part number DM74S112
Manufacturer Fairchild Semiconductor
File Size 42.46 KB
Description Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop
Datasheet download datasheet DM74S112-FairchildSemiconductor.pdf
Additional preview pages of the DM74S112 datasheet.

Product details

Description

This device contains two independent negative-edge-triggered J-K flip-flops with complementary outputs.

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