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DM74LS240 - Octal 3-STATE Buffer/Line Driver/Line Receiver

Download the DM74LS240 datasheet PDF. This datasheet also covers the DM74LS241 variant, as both devices belong to the same octal 3-state buffer/line driver/line receiver family and are provided as variant models within a single manufacturer datasheet.

Description

These buffers/line drivers are designed to improve both the performance and PC board density of 3-STATE buffers/ drivers employed as memory-address drivers, clock drivers, and bus-oriented transmitters/receivers.

Features

  • s 3-STATE outputs drive bus lines directly s PNP inputs reduce DC loading on bus lines s Hysteresis at data inputs improves noise margins s Typical IOL (sink current) 24 mA s Typical IOH (source current).
  • 15 mA s Typical propagation delay times Inverting Noninverting 10.5 ns 12 ns s Typical enable/disable time 18 ns s Typical power dissipation (enabled) Inverting Noninverting 130 mW 135 mW Ordering Code: Order Number DM74LS240WM DM74LS240SJ DM74LS240N DM74LS241WM DM74LS241N Package Num.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (DM74LS241_FairchildSemiconductor.pdf) that lists specifications for multiple related part numbers.

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
DM74LS240 • DM74LS241 Octal 3-STATE Buffer/Line Driver/Line Receiver August 1986 Revised March 2000 DM74LS240 • DM74LS241 Octal 3-STATE Buffer/Line Driver/Line Receiver General Description These buffers/line drivers are designed to improve both the performance and PC board density of 3-STATE buffers/ drivers employed as memory-address drivers, clock drivers, and bus-oriented transmitters/receivers. Featuring 400 mV of hysteresis at each low current PNP data line input, they provide improved noise rejection and high fanout outputs and can be used to drive terminated lines down to 133Ω.
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