DM74ALS165 - 8-Bit Parallel In/Serial Out Shift Register

Fairchild Semiconductor

Datasheet Details

Part number	DM74ALS165
Manufacturer	Fairchild Semiconductor
File Size	63.85 KB
Description	8-Bit Parallel In/Serial Out Shift Register
Datasheet	DM74ALS165_FairchildSemiconductor.pdf

The DM74ALS165 is an 8-bit serial register that, when clocked, shifts the data toward serial output, QH.

a clock inhibit function and a complemented serial output, QH. Clocking is accomplished by a LOW-to-HIGH transition of the CLK input while SH/LD is held HIGH and CLK INH is held LOW. The functions of the CLK and CLK INH (clock inhibit) inputs are interchangeable. Since a LOW CLK input and a LOW-to-HIGH transition of CLK INH will also accomplish clocking, CLK INH should be changed to the high level only while the CLK input is HIGH. Parallel loading is inhibited when SH/LD is held HIGH. The parall.

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Published: Apr 1, 2005 |