DM74174 Datasheet (Fairchild Semiconductor) - Hex/Quad D-Type Flip-Flop with Clear

DM74174, Hex/Quad D-Type Flip-Flop with Clear

These positive-edge triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic.

All have a direct clear input.

Information at the D inputs meeting the setup and hold time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse.

Clock triggering

DM74174 Features

* s Contains six flip-flops with single-rail outputs s Buffered clock and direct clear inputs s Individual data input to each flip-flop s Applications include: Buffer/storage registers Shift registers Pattern generators s Typical clock frequency 40 MHz s Typical power dissipation per flip-flop 38 mW