74S112 - Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop

Fairchild Semiconductor

The 74S112 by Fairchild Semiconductor is a Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop. Below is the official datasheet preview.

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74S112 Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop by Fairchild Semiconductor - Datasheet Preview — Official preview page of the **74S112** Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop datasheet (Fairchild Semiconductor).

Datasheet Details

Part number	74S112
Manufacturer	Fairchild Semiconductor
File Size	42.41 KB
Description	Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop
Datasheet	74S112-FairchildSemiconductor.pdf
Additional preview pages of the 74S112 datasheet.

74S112 Product details

Description

This device contains two independent negative-edge-triggered J-K flip-flops with complementary outputs.

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Published: Aug 29, 2014 |