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74LS645 - Octal Bus Transceiver

Description

These octal bus transceivers are designed for asynchronous two-way communication between data buses.

The devices transmit data from the A bus to the B bus or from the B bus to the A bus depending upon the level at the direction control (DIR) input.

Features

  • s Bi-directional bus transceivers in high-density 20-pin packages s Hysteresis at bus inputs improves noise margins s 3-STATE outputs Ordering Code: Order Number DM74LS645WM DM74LS645N Package Number M20B N20A Package.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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DM74LS645 Octal Bus Transceiver August 1986 Revised March 2000 DM74LS645 Octal Bus Transceiver General Description These octal bus transceivers are designed for asynchronous two-way communication between data buses. The devices transmit data from the A bus to the B bus or from the B bus to the A bus depending upon the level at the direction control (DIR) input. The enable input (G) can be used to disable the device so that the buses are effectively isolated. Features s Bi-directional bus transceivers in high-density 20-pin packages s Hysteresis at bus inputs improves noise margins s 3-STATE outputs Ordering Code: Order Number DM74LS645WM DM74LS645N Package Number M20B N20A Package Description 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.