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74LCX16240 - Low Voltage 16-Bit Inverting Buffer/Line Driver

Description

The LCX16240 contains sixteen inverting buffers with 3STATE outputs designed to be employed as a memory and address driver, clock driver, or bus-oriented transmitter/ receiver.

The device is nibble controlled.

Features

  • s 5V tolerant inputs and outputs s 2.3V.
  • 3.6V VCC specifications provided s 4.5 ns tPD max (VCC = 3.3V), 20 µA ICC max s Power down high impedance inputs and outputs s Supports live insertion/withdrawal (Note 1) s ±24 mA output drive (VCC = 3.0V) s Implements patented noise/EMI reduction circuitry s Latch-up performance exceeds 500 mA s ESD performance: Human body model > 2000V Machine model > 200V Note 1: To ensure the high-impedance state during power up or down, OE should be tied to VC.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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74LCX16240 Low Voltage 16-Bit Inverting Buffer/Line Driver with 5V Tolerant Inputs/Outputs February 1994 Revised April 1999 74LCX16240 Low Voltage 16-Bit Inverting Buffer/Line Driver with 5V Tolerant Inputs/Outputs General Description The LCX16240 contains sixteen inverting buffers with 3STATE outputs designed to be employed as a memory and address driver, clock driver, or bus-oriented transmitter/ receiver. The device is nibble controlled. Each nibble has separate 3-STATE control inputs which can be shorted together for full 16-bit operation. The LCX16240 is designed for low voltage (2.5V or 3.3V) VCC applications with capacity of interfacing to a 5V signal environment.
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