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P‐Channel Logic Level Enhancement Mode Field Effect Transistor
Product Summary:
BVDSS
‐20V
RDSON (MAX.)
20mΩ
ID
‐8.5A
Pb‐Free Lead Plating & Halogen Free
ABSOLUTE MAXIMUM RATINGS (TA = 25 °C Unless Otherwise Noted) PARAMETERS/TEST CONDITIONS
SYMBOL
Gate‐Source Voltage
Continuous Drain Current Pulsed Drain Current1
TA = 25 °C TA = 70 °C
Power Dissipation
TA = 25 °C TA = 70 °C
Operating Junction & Storage Temperature Range
VGS ID IDM PD Tj, Tstg
EMF20B02G
LIMITS ±12 ‐8.5 ‐6 ‐34 2 1.28
‐55 to 150
UNIT V
A
W °C
THERMAL RESISTANCE RATINGS THERMAL RESISTANCE
SYMBOL
Junction‐to‐Case
RJC
Junction‐to‐Ambient3
RJA
1Pulse width limited by maximum junction temperature. 2Duty cycle 1% 362.5°C / W when mounted on a 1 in2 pad of 2 oz copper.
TYPICAL
MAXIMUM 25 62.