Description
The EDD5108AFTA and the EDD5116AFTA are 512M bits Double Data Rate (DDR) SDRAM organized as 16,777,216 words × 8 bits × 4 banks and 8,388,608 words × 16 bits × 4 banks, respectively.
Features
- Power supply: VDD, VDDQ = 2.5V ± 0.2V.
- Data Rate: 333Mbps/266Mbps (max. ).
- Double Data Rate architecture; two data transfers per clock cycle.
- Bi-directional data strobe (DQS) is transmitted /received with data for capturing data at the receiver.
- Data inputs, outputs, and DM are synchronized with DQS.
- 4 internal banks for concurrent operation.
- DQS is edge aligned with data for READs; center aligned with data for WRITEs.
- Diffe.
EDD5108AFTA_ElpidaMemory.pdf
