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E5108ASE - EDE5108ASE

Description

The EDE5104AGSE is a 512M bits DDR2 SDRAM organized as 33,554,432 words × 4 bits × 4 banks.

The EDE5108AGSE is a 512M bits DDR2 SDRAM www.DataSheet4U.com organized as 16,777,216 words × 8 bits × 4 banks.

They are packaged in 60-ball FBGA (µBGA) package.

Features

  • Power supply: VDD, VDDQ = 1.8V ± 0.1V.
  • Double-data-rate architecture: two data transfers per clock cycle.
  • Bi-directional, differential data strobe (DQS and /DQS) is transmitted/received with data, to be used in capturing data at the receiver.
  • DQS is edge aligned with data for READs: centeraligned with data for WRITEs.
  • Differential clock inputs (CK and /CK).
  • DLL aligns DQ and DQS transitions with CK transitions.
  • Commands entered on e.

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Datasheet Details

Part number E5108ASE
Manufacturer Elpida Memory
File Size 743.45 KB
Description EDE5108ASE
Datasheet download datasheet E5108ASE Datasheet
Additional preview pages of the E5108ASE datasheet.

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PRELIMINARY DATA SHEET 512M bits DDR2 SDRAM EDE5104AGSE (128M words × 4 bits) EDE5108AGSE (64M words × 8 bits) Description The EDE5104AGSE is a 512M bits DDR2 SDRAM organized as 33,554,432 words × 4 bits × 4 banks. The EDE5108AGSE is a 512M bits DDR2 SDRAM www.DataSheet4U.com organized as 16,777,216 words × 8 bits × 4 banks. They are packaged in 60-ball FBGA (µBGA) package. Features • Power supply: VDD, VDDQ = 1.8V ± 0.
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