QL4016-2PF100C, QL4 Datasheet (ETC) - 16/000 Usable PLD Gate QuickRAM ESP Combining Performance/ Density and Embedded RAM

QL4016-2PF100C, QL4, 16/000 Usable PLD Gate QuickRAM ESP Combining Performance/ Density and Embedded RAM

QL4016 QuickRAM Data Sheet 16,000 Usable PLD Gate QuickRAM ESP Combining Performance, Density and Embedded RAM Device Highlights High Performance & High Density 16,000 Usable PLD Gates with 118 I/Os 300 MHz 16-bit Counters, 400 MHz Advanced I/O Capabilities Interfaces with both 3.3 V and 5.0 V devices PCI compliant with 3.3 V and 5.0 V busses Datapaths, 160+ MHz FIFOs 0.35 µm four-lay

QL4016-2PF100C Features

* up to 16 simultaneous inputs and five outputs within a cell that can be fragmented into five independent cells. Each cell has a fanin of 29 including register and control lines (see Figure 3). WDATA RAM Module (1,152 bits) RDATA WADDR RADDR RAM Module (1,152 bits) WDATA RDATA Figure 2: QuickR