Description
The BJ8P64N is an 8-bit microprocessor designed and developed with low-power and high-speed CMOS technology.
14-bit Electrical One Time Programmable Read Only Memory (OTP-ROM).
Features
- configuration z 2K.
- 14 bits on-chip ROM z 80.
- 8 bits on-chip registers (SRAM) z 8-level stacks for subroutine nesting z Less than 1.9 mA at 5V/4MHz z Typically 15uA, at 3V/32kHz z Typically 1 uA, during Sleep mode I/O port configuration z 3 bidirectional I/O ports : P5, P6, P7 z 17 I/O pins z Wake-up port : P5 z 8 Programmable pull-down I/O pins z 8 programmable pull-high I/O pins z 8 programmable open-drain I/O pins z External interrupt : P60 Operating voltage range z Operating voltage:2.
BJ8P64N_ETC.pdf
