Download the F50L2G41LB-104YG2ME datasheet PDF.
This datasheet also covers the F50L2G41LB-104YG2M variant, as both devices belong to the same 3.3v 2 gbit (2 x 1 gbit) spi-nand flash memory family and are provided as variant models within a single manufacturer datasheet.
Features
- Voltage Supply: 3.3V (2.7V~3.6V).
- Organization
- Memory Cell Array: (128M + 4M) x 8bit - Data Register: (2K + 64) x 8bit.
- Automatic Program and Erase - Page Program: (2K + 64) Byte - Block Erase: (128K + 4K) Byte.
- Page Read Operation - Page Size: (2K + 64) Byte - Read from Cell to Register with Internal ECC: 100us.
- Memory Cell: 1bit/Memory Cell.
- Support SPI-Mode 0 and SPI-Mode 31.
- Fast Write Cycle Time - Program time:400us - Block Erase time: 4ms.
- Hardwa.