Description
4.1 Coding Layer 6 4.2 Transfer Layer 9 4.3 Authentication Layer 15 4.4 Segmentation Layer 21 4.5 CPDU 22 4.6 Telemetry Reporting 24 5.
Features
- s Single Chip Implementation of all TC Decoder Core Functions s Built-in Authentication Unit s Built-in Command Pulse Distribution Unit Core Logic s Radiation Hard to 1MRads (Si) s High SEU Immunity, Latch-up Free s CMOS-SOS Technology s Conforms to CCSDS Standards s 6 NRZ TC Input Channels s 50Kbps Bit Rate s Low Power Consumption s Single 5V Supply s -55 to +125°C Operation
Trans- Power ponder Interface
MAP Interface
12 14
Pin connections
1/72
MA28140.
MA28140_DynexSemiconductor.pdf
