74LVC2G126 Datasheet (Diodes)

74LVC2G126, DUAL BUFFER GATE

The 74LVC2G126 is a dual buffer gate with 3-state outputs.

The device is designed for operation over a power supply range of 1.65V to 5.5V.

The device is fully specified for partial power down applications using IOFF.

The IOFF circuitry disables the output, preventing damaging current backflow when

74LVC2G126 Features

* Wide Supply Voltage Range from 1.65 to 5.5V

* ±24mA Output Drive at 3.3V

* CMOS Low Power Consumption

* IOFF Supports Partial-Power-Down Mode Operation

* Inputs accept up to 5.5V

* Schmitt Trigger Action at all inputs makes the circuit tolerant for slower input rise and fal