3D7105 Datasheet (Data Delay Devices) - MONOLITHIC 5-TAP FIXED DELAY LINE

3D7105, MONOLITHIC 5-TAP FIXED DELAY LINE

The 3D7105 5-Tap Delay Line product family consists of fixed-delay CMOS integrated circuits.

Each package contains a single delay line, tapped and buffered at 5 points spaced uniformly in time.

Tap-to-tap (incremental) delay values can range from 0.75ns through 8.0ns.

The input is reproduced at the

3D7105 Features

* data 3 ® delay devices, inc. PACKAGES IN N/C N/C O2 N/C O4 GND 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VDD N/C O1 N/C O3 N/C O5 IN 1 8 VDD All-silicon, low-power CMOS VDD IN 1 8 O2 2 7