Description
A0
A14 DQ0
DQ7
CE WE OE RST BW
VCC GND NC
- Address Inputs - Data In/Data Out - Chip Enable - Write Enable - Output Enable - Reset Output - Battery Warning - Power (+5V) - Ground - No Connect
DESCRIPTION
The DS1330 256k NV SRAMs are 262,144-bit, fully static, NV SRAMs organized as 32,768 words by 8 bits.Each NV SRAM has a self-contained lithium energy source and control circuitry which constantly monitors VCC for an out-of-tolerance condition.When such a condition occurs
Features
- 10 years minimum data retention in the absence of external power Data is automatically protected during power loss Power supply monitor resets processor when VCC power loss occurs and holds processor in reset during VCC ramp-up Battery monitor checks remaining capacity daily Read and write access times as fast as 70ns Unlimited write cycle endurance Typical standby current 50mA Upgrade for 32k x 8 SRAM, EEPROM or Flash Lithi.