Description
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198 Champion Court Document Number: 002-30704 Rev.
C
San Jose, CA 95134-1709
408-943-2600
Revised June 14, 2021
CYUSB3015 CYUSB3016 CYUSB3017
SX3 Block Diagram
Voltage Regulators
Power Modes
RAM
USB
Boot Mode
Boot ROM
Features
- Universal Serial Bus (USB) integration.
- USB 3.2, Gen 1 and USB 2.0 peripherals compliant with USB 3.2 Specification Revision 1.0.
- 5-Gbps SuperSpeed PHY compliant with USB 3.2 Gen 1.
- Three physical endpoints.
- Supports UVC, UAC, and USB vendor class protocol.
- General Configurable Interface.
- Support up to 100 MHz.
- 8-, 16-, 24-, and 32-bit data bus.
- Supports Slave FIFO, parallel camera interface.
- 32-bit CPU.
- ARM926EJ core with 200-MHz operation.
CYUSB3017 Datasheet
