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CY7C409A - 64 x 9 Cascadable FIFO

Download the CY7C409A datasheet PDF. This datasheet also covers the CY7C408A-15DMB variant, as both devices belong to the same 64 x 9 cascadable fifo family and are provided as variant models within a single manufacturer datasheet.

Description

The CY7C408A and CY7C409A are 64-word deep by 8- or 9-bit wide first-in first-out (FIFO) buffer memories.

In addition to the industry-standard handshaking signals, almost full/almost empty (AFE) and half-full (HF) flags are provided.

Features

  • 64 x 8 and 64 x 9 first-in first-out (FIFO) buffer memory.
  • 35-MHz shift in and shift out rates.
  • Almost Full/Almost Empty and Half Full flags.
  • Dual-port RAM architecture.
  • Fast (50-ns) bubble-through.
  • Independent asynchronous inputs and outputs.
  • Output enable (CY7C408A).
  • Expandable in word width and FIFO depth.
  • 5V ± 10% supply.
  • TTL complete.
  • Capable of withstanding greater than 2001V electro- static.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (CY7C408A-15DMB_CypressSemiconductor.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

Part Number Description Manufacturer
CY7C401 (CY7C401 - CY7C404) 64 x 4 Cascadable FIFO / 64 x 5 Cascadable FIFO Cypress Semiconductor
CY7C402 (CY7C401 - CY7C404) 64 x 4 Cascadable FIFO / 64 x 5 Cascadable FIFO Cypress Semiconductor
CY7C4021KV13 72-Mbit QDR-IV HP SRAM Cypress Semiconductor
CY7C403 (CY7C401 - CY7C404) 64 x 4 Cascadable FIFO / 64 x 5 Cascadable FIFO Cypress Semiconductor
CY7C404 (CY7C401 - CY7C404) 64 x 4 Cascadable FIFO / 64 x 5 Cascadable FIFO Cypress Semiconductor

Other Datasheets by Cypress (Infineon)

Part Number Description
CY7C408A 64 x 8 Cascadable FIFO
CY7C419 256/512/1K/2K/4K x 9 Asynchronous FIFO
CY7C4221 1 K / 2 K x 9 Synchronous FIFOs
CY7C4231 1 K / 2 K x 9 Synchronous FIFOs
CY7C425 256/512/1K/2K/4K x 9 Asynchronous FIFO

Full PDF Text Transcription

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1CY 7C40 9A CY7C408A CY7C409A 64 x 8 Cascadable FIFO 64 x 9 Cascadable FIFO Features • 64 x 8 and 64 x 9 first-in first-out (FIFO) buffer memory • 35-MHz shift in and shift out rates • Almost Full/Almost Empty and Half Full flags • Dual-port RAM architecture • Fast (50-ns) bubble-through • Independent asynchronous inputs and outputs • Output enable (CY7C408A) • Expandable in word width and FIFO depth • 5V ± 10% supply • TTL complete • Capable of withstanding greater than 2001V electro- static discharge voltage • 300-mil, 28-pin DIP Functional Description The CY7C408A and CY7C409A are 64-word deep by 8- or 9-bit wide first-in first-out (FIFO) buffer memories. In addition to the industry-standard handshaking signals, almost full/almost empty (AFE) and half-full (HF) flags are provided.
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