Z9973 Datasheet (Cypress Semiconductor) - Multi-Output Zero Delay Buffer

Z9973, Multi-Output Zero Delay Buffer

[2] Pin Number 11 12 9 10 44, 46, 48, 50 32, 34, 36, 38 16, 18, 21, 23 29 Pin Name PECL_CLK PECL_CLK# TCLK0 TCLK1 QA(3:0) QB(3:0) QC(3:0) FB_OUT VDDC VDDC VDDC VDDC PWR I/O Type I I I I O O O O PU PD PU PU PECL Clock Input.

PECL Clock Input.

External Reference/Test Clock Input.

External Reference/Te

Z9973 Features

* Output frequency up to 125 MHz 12 clock outputs: frequency configurable 350 ps max output-to-output skew Configurable output disable Two reference clock inputs for dynamic toggling