CYWB0224ABM Datasheet (Cypress Semiconductor)

CYWB0224ABM, West Bridge Astoria

Clock/SPI clock Chip Enable/NAND Chip Select/SPI Slave Select Address Bus 0/PNAND Command Latch Address Bus 1/PNAND Ready_Buy Addr.

Bus [3:2] Addr.

Bus 4/NAND Write Protect Address Bus 5/I2C clock Address Bus 6/I2C data Addr.

Bus 7 SPI Input/Data Bus 0 SPI Output/Data Bus 1 Data Bus Address Valid Ou

CYWB0224ABM Features

* Pseudo CRAM interface (Antioch Interface) Pseudo NAND Flash interface SPI (slave mode) interface DMA slave support N-Xpress™ NAND Controller Technology

* Interleave up to 16 NANDs with 8 Chip Enables (CE#) for x8 or x16 SLC (CYWB022