CY2XP304 Datasheet (Cypress Semiconductor) - High-Frequency Programmable PECL Clock Generation Module

CY2XP304, High-Frequency Programmable PECL Clock Generation Module

3.3V Power Supply for Crystal Driver SER_CLK Serial Interface Clock SER_DATA Serial Interface Data PLL_MULT PLL Multiplier Select Input, Internal pull-up resistor, see Frequency Table CLK_SEL INA,INAB NC Clock Select Input, Internal Pull down.

HIGH select INA/INAB, Internal PLL is bypassed.

LOW sel

CY2XP304 Features

* Period jitter peak-peak 125MHz(max.) = 55 ps

* Four low-skew LVPECL outputs

* Phase-locked loop (PLL) multiplier select

* Serially-configurable multiply ratios

* Eight-bit feedback counter and six-bit reference counter for high accuracy

* HSTL inputs