Datasheet Details
| Part number | CY28442 |
|---|---|
| Manufacturer | Cypress Semiconductor |
| File Size | 319.63 KB |
| Description | Clock Generator |
| Datasheet |
|
| Part number | CY28442 |
|---|---|
| Manufacturer | Cypress Semiconductor |
| File Size | 319.63 KB |
| Description | Clock Generator |
| Datasheet |
|
CY28442 I/O, PU 3.3V LVTTL input for enabling assigned SRC clock (active low) or 100 MHz Serial Reference Clock.Selectable through CLKREQA# defaults to enable/disable SRCT/C4, CLKREQB# defaults to enable/disable SRCT/C5. Assignment can be changed via SMBUS register Byte 8. PWR GND 3.3V power supply for outputs.Ground for outputs.7 6 3,4,5 8 VDD_PCI VSS_PCI PCI ITP_EN/PCIF0 O, SE 33-MHz clock I/O, SE 3.3V LVTTL input to enable SRC7 or CPU2_ITP/33 MHz clock output.(sampled on the VTT_PWRG
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