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CY28351 Differential Clock Buffer/Driver

CY28351 Description

CY28351 Differential Clock Buffer/Driver DDR400- and DDR333-Compliant .
This PLL clock buffer is designed for 2.

CY28351 Features

* Supports 333-MHz and 400-MHz DDR SDRAM
* 60-
* 200-MHz operating frequency

CY28351 Applications

* Distributes one clock input to ten differential outputs
* External feedback pin (FBIN) is used to synchronize the outputs to the clock input
* Conforms to the DDRI specification
* Spread Aware for electromagnetic interference (EMI) reduction
* 48-pin SSOP pa

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Datasheet Details

Part number
CY28351
Manufacturer
Cypress Semiconductor
File Size
71.38 KB
Datasheet
CY28351-CypressSemiconductor.pdf
Description
Differential Clock Buffer/Driver

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