CS2100-CP Datasheet (Cirrus Logic) - Fractional-N Clock Multiplier

CS2100-CP, Fractional-N Clock Multiplier

The CS2100-CP is an extremely versatile system clocking device that utilizes a programmable phase lock loop.

The CS2100-CP is based on a hybrid analog-digital PLL architecture comprised of a unique combination of a Delta-Sigma Fractional-N Frequency Synthesizer and a Digital PLL.

This architecture a

CS2100-CP Features

* Clock Multiplier / Jitter Reduction Generates a Low Jitter 6 - 75 MHz Clock from a Jittery or Intermittent 50 Hz to 30 MHz Clock Source Highly Accurate PLL Multiplication Factor

* Maximum Error Less Than 1 PPM in HighResolution Mode ® I²C / SPI™ Control Port Configurable Auxi