Datasheet Details
- Part number
- AR9344
- Manufacturer
- Atheros
- File Size
- 3.86 MB
- Datasheet
- AR9344-Atheros.pdf
- Description
- Highly-Integrated and Feature-Rich IEEE 802.11n 2x2 2.4/5 GHz Premium SoC
AR9344 Description
Data Sheet PRELIMINARY December 2010 AR9344 Highly-Integrated and .AR9344 Features
* include Maximal Likelihood (ML) decoding, Low-Density Parity Check (LDPC), Maximal Ratio Combining (MRC), Tx Beamforming (TxBF), and On-Chip One-Time Programmable (OTP) memory. The AR9344 PCIE Root Complex interface can be used to connect to another Atheros single-chip MAC/BB/radio for dual concurreAR9344 Applications
* The AR9344 supports booting from either NOR or NAND flash. If NOR flash is used as boot codestore, an additional NAND flash device can still be connected, for end-user multimedia storage and other applications. When connecting the AR9344 to an external host through the PCIE Endpoint interface, or t
📁 Related Datasheet
📌 All Tags