P3204M2S5X2 Datasheet (Apollo Memory System)

P3204M2S5X2, Embedded MCP

CLK I Clock DAT0 I/O/PP Data DAT1 I/O/PP Data DAT2 I/O/PP Data DAT3 I/O/PP Data DAT4 I/O/PP Data DAT5 I/O/PP Data DAT6 I/O/PP Data DAT7 I/O/PP Data CMD I/O/PP/OD Command/Response RST_n I Hardware reset VCC S Supply voltage for Core VCCQ S Supply voltage for I/O

eMCP Specification Embedded MCP specification P3204M2S5X2 Datasheet Preliminary Ver 1.0 Apollo Memory System Company ____________________________________________________________________________________________________________________ © 2014 Apollo memory system company 1 CONFIDENTIAL eMCP Specification - Compatible Approved Vendor List Chipset AVL Chipset Model eMCP PN Mediatek MT6572 04EMCP04-EL2AS100 Note 1: compatible AVL updated by 2014,Q4 -De

P3204M2S5X2 Features

* SDR Data sampling method

* CLK frequency up to 200MHz Data rate

* up to 200MB/s

* 8-bits bus width supported

* Single ended signaling with 4 selectable Drive Strength

* Signaling levels of 1.8V

* Tuning concept for Read Operations 1.3.2 HS20