ADSP-21991 Datasheet (Analog Devices) - Mixed Signal DSP Controller

ADSP-21991, Mixed Signal DSP Controller

2 DSP Core Architecture .

3 Memory Architecture .

4 Internal (On-Chip) Memory .

5 External (Off-Chip) Memory .

m o .c U 4 t e e h S a at .D w w w a Mixed Signal DSP Controller ADSP-21991 Three Phase 16-Bit Center Based PWM Generation Unit with 12.5 ns Resolution at 160 MHz Core Clock (CCLK) Rate Dedicated 32-Bit Encoder Interface Unit with Companion Encoder Event Timer Dual 16-Bit Auxiliary PWM Outputs 16 General-Purpose Flag I/O Pins Three Programmable 32-Bit Interval Timers SPI Communications Port with Master or Slave Operation Synchronous Serial Communications Port (SPORT) Capable of Software UART E

ADSP-21991 Features

* ADSP-219x, 16-Bit, Fixed Point DSP Core with up to 160 MIPS Sustained Performance 40K Words of On-Chip RAM, Configured as 32K Words On-Chip 24-Bit Program RAM and 8K Words On-Chip 16-Bit Data RAM External Memory Interface Dedicated Memory DMA Controller for Data/Instruction Transfer between Internal