Datasheet Details
| Part number | AD805 |
|---|---|
| Manufacturer | Analog Devices ↗ |
| File Size | 307.39 KB |
| Description | Data Retiming Phase-Locked Loop |
| Datasheet |
|
| Part number | AD805 |
|---|---|
| Manufacturer | Analog Devices ↗ |
| File Size | 307.39 KB |
| Description | Data Retiming Phase-Locked Loop |
| Datasheet |
|
The AD805 is a data retiming phase-locked loop designed for Ouse with a Voltage-Controlled Crystal Oscillator (VCXO) to perform clock recovery and data retiming on Nonreturn to Zero B(NRZ) data.The circuit provides clock recovery and data Sretiming on standard telecommunications STS-3 or STM-1 data (155.52 Mbps).A Vectron C0-434Y Series VCXO circuit Ois used with the AD805 for specification purposes.Similar circuit performance can be ob
📁 AD805 Similar Datasheet