T8208 - ATM Interconnect

Agere Systems

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Datasheet Details

Part number	T8208
Manufacturer	Agere Systems
File Size	2.92 MB
Description	ATM Interconnect
Datasheet	T8208_AgereSystems.pdf

T8208 Product details

Description

9 1.4 Conventions 12 1.5 Glossary 13 2 Pinout 14 3 Powerup/Reset Sequence 22 4 Hot Insertion23 5 PLL Configuration 24 6 Microprocessor Interface 25 6.1 Microprocessor Interface Configuration 25 6.2 Microprocessor Interrupts25 6.3 Accessing the CelXpres T8208 via Microprocessor Interface25 6.3.1 Accessing the Extended Memory Registers26 6.3.1.1 Extended Memory Writes26 6.3.1.2 Extended Memory Reads26 6.3.2 CelXpres T8208 Access Performance 27 7 General-Purpose I/O (GPIO) 28 8 Look-Up Table 29 8.1

Features

s Programmable priority for control/data cells transmission onto cell bus Microprocessor access to all headers of control cell Ability to clear counters on read Simplified looping to any system device with a single register programming UTOPIA clock sourcing with additional settings Programmable operations and maintenance and resource management (OAM/RM) cell routing Support of multicast and broadcast cells per PHY s OC-12 data throughput on UTOPIA (16-bit) (independently on RX and TX UTOPIA).

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Published: Jul 19, 2006 |