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ATLV10 - Ultra Low Voltage Gate Arrays

Download the ATLV10 datasheet PDF. This datasheet also covers the ATLV variant, as both devices belong to the same ultra low voltage gate arrays family and are provided as variant models within a single manufacturer datasheet.

General Description

The ATLV Series CMOS gate arrays employ 1.0 µ-drawn, double-level metal, Si-gate, CMOS technology processed in Atmel's U.S.-based, advanced manufacturing facility.

The arrays utilize an enhanced channelless architecture which results in greater than 50 percent usable gates.

Key Features

  • Specifically Designed for Battery Powered.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (ATLV_ATMELCorporation.pdf) that lists specifications for multiple related part numbers.

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Other Datasheets by Atmel (Microchip)

Part Number Description
ATLV15 Ultra Low Voltage Gate Arrays
ATLV2 Ultra Low Voltage Gate Arrays
ATLV20 Ultra Low Voltage Gate Arrays
ATLV3 Ultra Low Voltage Gate Arrays
ATLV35 Ultra Low Voltage Gate Arrays

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
ATLV Features Specifically Designed for Battery Powered Applications 1.0 - 3.0 Volts and will Operate from 0.7 to 5.5 Volts • Static Current Drain of <75 nA at 1.0 Volts • 200 MHz Maximum Toggle Frequency for Flip Flop at 1.5 Volts • 1.0 µ Drawn Gate Length CMOS Gate Arrays • All Package Styles Offered Including TQFP and TAB • Improved Product Testability Using Serial Scan, Boundary Scan, www.datasheet4u.com and JTAG • Second Source Existing ASIC Design in Atmel's ATLV via Design Translation. Improved Performance and Lower Cost • Description The ATLV Series CMOS gate arrays employ 1.0 µ-drawn, double-level metal, Si-gate, CMOS technology processed in Atmel's U.S.-based, advanced manufacturing facility.