AMD-8131BLC - Hyper Transport PCI-X Tunnel

AMD

Datasheet Details

at any time without notice.

HyperTransport technology tunnel with side A and side B.
Side A is 16 bits (input and output); side B is 8 bits.
Either side may connect to the host or to a downstream HyperTransport technology compliant device.
Each side supports HyperTransport technology-defined reduced bit widths: 8-bit, 4-bit, and 2-bit.
Each side supports transfer rates of 1600, 1200, 800, and 400 mega-transfers per second.
Maximum bandwidth is 6.4 gigabytes per second acros.

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Published: Apr 19, 2005 |