HEF4021B Datasheet 8-bit static shift register

Manufacturer: Nexperia

HEF4021B 8-bit static shift register by Nexperia - Datasheet Preview

Datasheet Details

Part number	HEF4021B
Manufacturer	Nexperia
File Size	238.20 KB
Description	8-bit static shift register
Datasheet	HEF4021B Datasheet

General Description

The HEF4021B is an 8-bit static shift register (parallel-to-serial converter) with a synchronous serial data input (DS), a clock input (CP), an asynchronous active HIGH parallel load input (PL), eight asynchronous parallel data inputs (D0 to D7) and buffered parallel outputs from the last three stages (Q5 to Q7).

Each register stage is a D-type master-slave flip-flop with a set direct (SD) and clear direct (CD) input.

Information on D0 to D7 is asynchronously loaded into the register while PL is HIGH, independent of CP and DS.

Overview

HEF4021B 8-bit static shift register Rev.

11 — 1 December 2021 Product data sheet 1.

Key Features

Wide supply voltage range from 3.0 V to 15.0 V.
CMOS low power dissipation.
High noise immunity.
Tolerant of slower rise and fall times.
Fully static operation.
5 V, 10 V, and 15 V parametric ratings.
Standardized symmetrical output characteristics.
Complies with JEDEC standard JESD 13-B.
ESD protection:.
HBM JESD22-A114F exceeds 2000 V.
MM JESD22-A115-B exceeds 200 V.
Specified from -40.

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