HEF4014B
Description
The HEF4014B is a fully synchronous edge-triggered 8-bit static shift register with eight synchronous parallel inputs (D0 to D7), a synchronous serial data input (DS), a synchronous parallel enable input (PE), a LOW-to-HIGH edge-triggered clock input (CP) and buffered parallel outputs from the last three stages (Q5 to Q7). Operation is synchronous and the device is edge-triggered on the LOW-to-HIGH transition of CP.
Key Features
- Tolerant of slow clock rise and fall times
- Fully static operation
- 5 V, 10 V, and 15 V parametric ratings
- Standardized symmetrical output characteristics
- Specified from -40 °C to +85 °C
- Complies with JEDEC standard JESD 13-B
