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74VHC02 - Quad 2-input NOR gate

General Description

The 74VHC02; 74VHCT02 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL (LSTTL).

They are specified in compliance with JEDEC standard No.

7-A.

Key Features

  • Balanced propagation delays.
  • All inputs have a Schmitt-trigger action.
  • Inputs accept voltages higher than VCC.
  • Input levels:.
  • The 74VHC02 operates with CMOS input level.
  • The 74VHCT02 operates with TTL input level.
  • ESD protection:.
  • HBM JESD22-A114E exceeds 2000 V.
  • MM JESD22-A115-A exceeds 200 V.
  • CDM JESD22-C101C exceeds 1000 V.
  • Multiple package options.
  • Specified from -40 °C to +85 °C and.

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Datasheet Details

Part number 74VHC02
Manufacturer Nexperia
File Size 220.83 KB
Description Quad 2-input NOR gate
Datasheet download datasheet 74VHC02 Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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74VHC02; 74VHCT02 Quad 2-input NOR gate Rev. 2 — 15 April 2020 Product data sheet 1. General description The 74VHC02; 74VHCT02 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7-A. The 74VHC02; 74VHCT02 provide a quad 2-input NOR function. 2.