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74LVC74A Datasheet Dual D-type flip-flop

Manufacturer: Nexperia

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Datasheet Details

Part number 74LVC74A
Manufacturer Nexperia
File Size 280.46 KB
Description Dual D-type flip-flop
Datasheet download datasheet 74LVC74A Datasheet

General Description

The 74LVC74A is a dual edge triggered D-type flip-flop with individual data (nD) inputs, clock (nCP) inputs, set (nSD) and (nRD) inputs, and complementary nQ and nQ outputs.

The set and reset are asynchronous active LOW inputs and operate independently of the clock input.

Information on the data input is transferred to the nQ output on the LOW-to-HIGH transition of the clock pulse.

Overview

74LVC74A Dual D-type flip-flop with set and reset; positive-edge trigger Rev.

12 — 6 May 2025 Product data sheet 1.

Key Features

  • 5 V tolerant inputs for interlacing with 5 V logic.
  • Wide supply voltage range from 1.2 V to 3.6 V.
  • CMOS low power consumption.
  • Direct interface with TTL levels.
  • Complies with JEDEC standard:.
  • JESD8-7A (1.65 V to 1.95 V).
  • JESD8-5A (2.3 V to 2.7 V).
  • JESD8-C/JESD36 (2.7 V to 3.6 V).
  • ESD protection:.
  • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V.
  • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000.

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