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74LVC2G17 - Dual non-inverting Schmitt trigger

General Description

The 74LVC2G17 is a dual buffer with Schmitt-trigger inputs.

Inputs can be driven from either 3.3 V or 5 V devices.

This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments.

Key Features

  • Wide supply voltage range from 1.65 V to 5.5 V.
  • Overvoltage tolerant inputs to 5.5 V.
  • High noise immunity.
  • ±24 mA output drive (VCC = 3.0 V).
  • CMOS low-power consumption.
  • Latch-up performance exceeds 250 mA.
  • Direct interface with TTL levels.
  • IOFF circuitry provides partial Power-down mode operation.
  • Complies with JEDEC standard:.
  • JESD8-7 (1.65 V to 1.95 V).
  • JESD8-5 (2.3 V to 2.7 V).
  • JESD-8.

📥 Download Datasheet

Datasheet Details

Part number 74LVC2G17
Manufacturer Nexperia
File Size 253.53 KB
Description Dual non-inverting Schmitt trigger
Datasheet download datasheet 74LVC2G17 Datasheet

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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74LVC2G17 Dual non-inverting Schmitt trigger with 5 V tolerant input Rev. 11 — 24 January 2022 Product data sheet 1. General description The 74LVC2G17 is a dual buffer with Schmitt-trigger inputs. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. 2. Features and benefits • Wide supply voltage range from 1.65 V to 5.5 V • Overvoltage tolerant inputs to 5.5 V • High noise immunity • ±24 mA output drive (VCC = 3.