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74LVC2G125 - Dual bus buffer/line driver

General Description

The 74LVC2G125 is a dual buffer/line driver with 3-state outputs controlled by the output enable inputs (nOE).

Inputs can be driven from either 3.3 V or 5 V devices.

This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments.

Key Features

  • Wide supply voltage range from 1.65 V to 5.5 V.
  • High noise immunity.
  • IOFF circuitry provides partial Power-down mode operation.
  • ±24 mA output drive (VCC = 3.0 V).
  • CMOS low-power consumption.
  • Latch-up performance exceeds 250 mA.
  • Direct interface with TTL levels.
  • Overvoltage tolerant inputs to 5.5 V.
  • Complies with JEDEC standard:.
  • JESD8-7 (1.65 V to 1.95 V).
  • JESD8-5 (2.3 V to 2.7 V).

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Datasheet Details

Part number 74LVC2G125
Manufacturer Nexperia
File Size 268.05 KB
Description Dual bus buffer/line driver
Datasheet download datasheet 74LVC2G125 Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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74LVC2G125 Dual bus buffer/line driver; 3-state Rev. 17 — 26 July 2021 Product data sheet 1. General description The 74LVC2G125 is a dual buffer/line driver with 3-state outputs controlled by the output enable inputs (nOE). Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. 2. Features and benefits • Wide supply voltage range from 1.65 V to 5.